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ASIC Design Services
 

ASIC Design Services
 
 
ASIC
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Design Flow
 
FPGA
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ASIC based solutions are cost effective for volume production. ASIC designs also provide improved performance through reduced power consumption, higher speed, higher functionality and smaller foot print. ASICs can enable novel applications which cannot be designed with the existing FPGA based flows. Aivea will work with the client to determine if a ASIC based solution is ideal for their requirements. Aivea offers a broad range of services in the ASIC design space starting from specification to interfacing with the foundry.

Product Definition
  • Architectural definitions and specifications
  • Design ground rules generation
  • Technology evaluation/vendor selection
Design
  • RTL code generation (Verilog and VHDL)
  • High-speed interface design
  • Multiple clock domain design
  • Logic synthesis
  • Verification
  • Testbench generation
  • Functional and formal verification
  • Code coverage analysis
  • Bus functional models
Pre-Layout
  • Static timing analysis
  • Signal integrity analysis (ASIC and System)
  • High-speed clock design
  • Testability (DFT, scan, logic, and RAM BIST, JTAG)
  • HSPICE modeling
Layout
  • Floorplanning
  • Clock tree synthesis
  • Physical synthesis
  • Placement and Routing
ASIC Foundry Interface
  • ASIC foundry release processing (based on extensive experience working with leading-edge foundries)
  • Texas Instruments certified design center
  • IBM Microelectronics ASOK® and ChipBench® release processing